To evaluate semiconductor device models, there are several known processes. For example, in a process using linear table models, multi-dimensional grids can be populated with measurement (e.g., currents and/or charges as functions of terminal voltages) values of semiconductor device models. Linear interpolation may then be utilized to generate, e.g., current and/or charge values for a circuit simulator which needs device evaluations during its operation. In another example, higher order polynomial function table models may be used that rely on multiple grid points from neighboring regions to build and solve polynomial equations representing, e.g., the current and/or charge values.
However, the known processes for semiconductor device evaluation include several issues. For example, in the linear table model process, when the linear interpolation generates a first order derivative, the resulting current and/or charge values may not be continuous across boundaries of the multi-dimensional grids. This lack of continuity across the boundaries causes simulation difficulties for the circuit simulator. In the higher order polynomial function table model process, a non-uniform grid including a high amount of sample points may be required that is costly to generate and manage to ensure that the polynomial equations and their derivatives follow the measurement data closely. For all known processes, a circuit simulator's knowledge of evaluation equations may also be required, and may have to be set and inflexible for evaluation. In addition, the known processes may consume an exorbitant amount of memory and/or processing capabilities during evaluation due to the complexity of the higher order polynomial function table models.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.